ULTRARAM™
Technology
ULTRARAM™
EXTREME DATA RETENTION
ULTRARAM has a flash-like structure. The presence of electrons in a floating gate determines the logic state of the memory, i.e. whether it is storing a 1 or a 0. To be classed as non-volatile the memory must be able to retain this charge for extended periods whilst unpowered.
In the absence of an applied voltage the triple-barrier resonant-tunnelling structure (TBRT) is highly insulating. Therefore, the floating gate is electrically isolated, and the electrons are trapped.
This makes ULTRARAM non-volatile – even when unpowered it can store data for over 1,000 years.
In the absence of an applied voltage the triple-barrier resonant-tunnelling structure (TBRT) is highly insulating. Therefore, the floating gate is electrically isolated, and the electrons are trapped.
This makes ULTRARAM non-volatile – even when unpowered it can store data for over 1,000 years.
Retention
Retention
HIGH-SPEED PROGRAM/ERASE
AT ULTRA-LOW ENERGY
HIGH-SPEED
PROGRAM/
ERASE AT
ULTRA-LOW
ENERGY
Program/Erase
Program/Erase
ULTRARAM™
HIGH SPEED AND ULTRA-LOW ENERGY
ULTRARAM™ uses the power of quantum mechanics to achieve ultra-low energy program/erase at DRAM-like speeds.
The application of a small, 2.5 V, control gate voltage unlocks the TBRT, allowing electrons to flow into the floating gate, programming the memory cell. Electron flow occurs by quantum-mechanical resonant-tunnelling, which is extremely fast.
The removal of the gate voltage locks the TBRT, trapping the electrons. By applying a 2.5 V control gate voltage with the opposite polarity, the TBRT once again unlocks, but electrons flow in the opposite direction, erasing the memory cell.
The combination of small program/erase voltages, short pulse durations and the intrinsically low capacitance of the memory cell allows ULTRARAM to achieve DRAM-like speeds with a switching energy per unit area that is lower than any other memory technology.
The application of a small, 2.5 V, control gate voltage unlocks the TBRT, allowing electrons to flow into the floating gate, programming the memory cell. Electron flow occurs by quantum-mechanical resonant-tunnelling, which is extremely fast.
The removal of the gate voltage locks the TBRT, trapping the electrons. By applying a 2.5 V control gate voltage with the opposite polarity, the TBRT once again unlocks, but electrons flow in the opposite direction, erasing the memory cell.
The combination of small program/erase voltages, short pulse durations and the intrinsically low capacitance of the memory cell allows ULTRARAM to achieve DRAM-like speeds with a switching energy per unit area that is lower than any other memory technology.
Program/Erase
Program/Erase
ULTRARAM™
HIGH SPEED AND ULTRA-LOW ENERGY
ULTRARAM™ uses the power of quantum mechanics to achieve ultra-low energy program/erase at DRAM-like speeds.
The application of a small, 2.5 V, control gate voltage unlocks the TBRT, allowing electrons to flow into the floating gate, programming the memory cell. Electron flow occurs by quantum-mechanical resonant-tunnelling, which is extremely fast.
The removal of the gate voltage locks the TBRT, trapping the electrons. By applying a 2.5 V control gate voltage with the opposite polarity, the TBRT once again unlocks, but electrons flow in the opposite direction, erasing the memory cell.
The combination of small program/erase voltages, short pulse durations and the intrinsically low capacitance of the memory cell allows ULTRARAM to achieve DRAM-like speeds with a switching energy per unit area that is lower than any other memory technology.
The application of a small, 2.5 V, control gate voltage unlocks the TBRT, allowing electrons to flow into the floating gate, programming the memory cell. Electron flow occurs by quantum-mechanical resonant-tunnelling, which is extremely fast.
The removal of the gate voltage locks the TBRT, trapping the electrons. By applying a 2.5 V control gate voltage with the opposite polarity, the TBRT once again unlocks, but electrons flow in the opposite direction, erasing the memory cell.
The combination of small program/erase voltages, short pulse durations and the intrinsically low capacitance of the memory cell allows ULTRARAM to achieve DRAM-like speeds with a switching energy per unit area that is lower than any other memory technology.
ULTRARAM™
NON-DESTRUCTIVE READOUT
The logic state of ULTRARAM memory is read by measuring the conductance of an underlying channel. The channel conductance is dependent on the logic state of the memory: If electrons are present in the floating gate (logic state 0) they repel electrons in the channel and the conductance is low. If the floating gate is empty (logic state 1) the channel conductance is high.
This readout method is non-destructive, which means that unlike DRAM, the logic state of the memory is preserved after read and doesn’t need to be re-written. This greatly reduces the complexity and energy consumption of ULTRARAM memory chips.
This readout method is non-destructive, which means that unlike DRAM, the logic state of the memory is preserved after read and doesn’t need to be re-written. This greatly reduces the complexity and energy consumption of ULTRARAM memory chips.
READOUT
READOUT
